Mr. TSENG Chen Wei

He is currently a functional safety technical manager at SGS, Chen Wei has over 15 years of experience in radiation effects, testing, and applications. Previously at Xilinx (now AMD), he was responsible for single event effect testing and mitigation validation. He developed and validated COTS solutions for devices such as FPGA, MCU, and memory at joint testing consortium XRTC. He was involved in COTS experiment SUXSE at ISS and responsible for COTS FPGA centric architecture flight compute module. As he transitioned to commercial applications, he provided solutions for high reliability application including server, data center, and telecom. 

Presentation Title

Radiation Effects in Advance Packaging for Semiconductor

The evolution of semiconductor technology toward heterogeneous integration and 2.5D/3D advanced packaging has introduced complex reliability challenges, particularly concerning radiation-induced effects. While traditional monolithic radiation-hardening focused primarily on the silicon die, advanced packaging architectures—utilizing Through-Silicon Vias (TSVs), microbumps, and high-density redistribution layers (RDLs)—present new vulnerabilities and interaction mechanisms.

This presentation explores the impact of radiation effects on advanced packaging materials and structures. Known effects from increased integration density affects Single Event Effects (SEEs), Total Ionizing Dose (TID) sensitivity from NDT, and materials common in advanced bumps and substrates.

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