Mr. LOO Joon Seng
Senior Technical Marketing Engineer, Nexustest
Loo Joon Seng is a Senior Technical Marketing Engineer at NEXUSTEST PTE. LTD., specializing in cutting-edge semiconductor testing. He is instrumental in driving technology trends for the SiPh tester product roadmap, with a core focus on Silicon Photonics (SiPh) and Wafer Acceptance Test (WAT) solutions which bridges the gap between engineering innovation and market requirements to advance high-performance testing standards.
Presentation Title: The AI Surge: Overcoming High-Volume Challenges in SiPh Wafer-Level Testing
(Co-Speak with Dr. Jeffrey LAM, Chief Technology Officer, CompoundTek | Chairman, SEMI Southeast Asia Advanced Product Testing Technical Committee)
The exponential growth of Artificial Intelligence (AI) is rapidly accelerating the demand for high-bandwidth interconnects, forcing Silicon Photonics (SiPh) to scale from R&D environments into true High-Volume Manufacturing (HVM). However, this scale-up is currently bottlenecked by traditional Wafer-Level Testing (WLT) methods, which struggle with optical coupling instability, calibration delays, and low throughput.
This presentation, a collaboration between NEXUSTEST and CompoundTek, explores the critical transition from manual "Lab" characterization to fully automated "Fab" production. We will address the core automation challenges in SiPh WLT and demonstrate how deploying high-speed, automated active coupling platforms—specifically the NEXUSTEST sCT9002—bridges the gap to mass production. By achieving less than 3 minutes calibration cycles and strict <0.2 dB optical repeatability, modern test architectures can guarantee production stability while catching defects early at the wafer level. Attendees will learn how next-generation capabilities, including (CPO) OE bare die testing and multi-die parallel testing readiness, are unlocking HVM and reducing total test costs to meet the industry's future AI demands.