Dr. Rama SHUKLA

Dr.Rama Shukla is the Vice President of Technology Strategy, Flash Backend, at Sandisk Corporation, where he oversees the strategic programs involving R&D, architecture, design, development, and deployment of Advanced Flash Products Package Technologies.

With extensive expertise in integrated circuit technology and product development, Dr. Shukla has held senior technical and operational roles at Qualcomm, Intel, and startups, contributing significantly to innovations such as CVD tungsten interconnects and Flip Chip on Organic Substrates, earning the IEEE Manufacturing Technology of the Year Award.

Dr. Shukla holds a Ph.D. in Materials Science and Engineering from UC Berkeley and a Master’s from IIT Kanpur and is based at Sandisk's Milpitas, California site.

Keynote 

Enabling the AI Inferencing Era with Advanced Flash and Packaging Innovations

The rapid transition to an AI inferencing–centric era is creating unprecedented market opportunities across cloud, edge, and enterprise platforms. As large language models (LLMs) continue to scale in size, they increasingly encounter the “memory wall,” a fundamental bottleneck that constrains inferencing performance, power efficiency, total cost of ownership (TCO), and overall token economics. These challenges are further amplified by the diversity of inference platforms, ranging from hyperscale data centers to resource, form-factor and cost constrained edge systems.

This landscape presents a compelling opportunity for further innovations at the memory and system architecture levels. Flash-based memory technologies, traditionally optimized for storage, are undergoing evolution to meet the emerging demands of AI Inferencing, emphasizing the needs for higher capacity and improved bandwidth/latency, enabling more efficient handling of data-intensive workloads.

Simultaneously, advances in semiconductor packaging are becoming a critical enabler of this transformation. Heterogeneous integration, 3D stacking, and advanced interconnects are redefining how memory and compute are co-designed, unlocking new levels of system performance and efficiency. In particular, emerging concepts such as High-Bandwidth Flash (HBF®) illustrate the potential for disruptive architectures to meet domain specific memory requirements for inferencing AI.

This presentation will explore the evolution of flash memory technologies and packaging innovations in the context of AI inferencing platforms, including HBF®, and examine the broader ecosystem of technology building blocks that are required to bring these solutions to scale. Attendees will gain insights into the opportunities and challenges for the next-generation memory systems to overcome current limitations and enable the continued growth of AI-driven Inference applications.

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