Mr. TING Jia Wen

Manager, Test Development Engineering
GLOBALFOUNDRIES Singapore Pte Ltd, Singapore

TING Jia Wen received his master degree in Electrical and Engineering in 2003 from I-Shou University, Taiwan.  He is currently a Manager of Test Development Engineering in the Department of Product, Testing and Failure Analysis at  GLOBALFOUNDRIES Singapore Pte Ltd, focusing on embedded Magnetoresistive Random Access Memory (MRAM), Radio Frequency (RF) and Power Management IC (PMIC) testing methodology development in leading technologies.  In the last 15 years, he has built up a wide scope of semiconductor IC testing through hands-on experience in OSATs, Foundries and Design House. His expertise is mainly on wafer and package level product testing of System-on-Chip, RF and Memory devices, including coding development, probe card design, platform conversion and testing debug.

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