Senior Test Engineer
Intel Products (M) Sdn Bhd, Malaysia
Structural test architect responsible in path finding and validating new board test technology. Ensure smooth deployment of test strategy across factories.
Papers presented at IEEE International Test Conference:
- Augmenting Board Test Coverage with New Intel Powered Opens Boundary Scan Instruction (2009) IEEE International Test Conference
- Challenges of Implementing Bead Probe Technology (BPT) in High Volume Manufacturing (HVM)
- Impact of Quad Flat No Lead package (QFN) on automated X-ray inspection (AXI). 2007